2020-10-13 BTS7200 smoke test debugging

Owned by Ryan Dancy
Oct 14, 2020
5 min read

E-load says 0.5A output → 1170 or so read converted

The BTS7200 smoke test won’t get any real values without first flashing the PCA9539R smoke test.

Which channel does the load appear on appear on? (Should be on 7 ch 1)

  • {0, 1, 2, 3, 4, 5, 6, 7} → 0 ch 0

  • {5, 0, 7, 1} → 1 ch 0

  • {5, 1, 7, 0} → 0 ch 0

  • {7} → 7 ch 0

  • {5, 0, 7, 1, 2} → 1 ch 0

  • {7, 1, 0, 2} → 1 ch 0

  • {1, 2, 0, 7} → 1 ch 0

It’s always on the first ADC read after 7!

Some logs:

NOTES: readings on a 5 ms timer. Not actually sure how long the ADC takes. "setting state again" means pca9539r_gpio_set_state(s_bts7200_storage.select_pin_pca9539r, PCA9539R_GPIO_STATE_SELECT_OUT_1); "settings state 3" means pca9539r_gpio_set_state(s_bts7200_storage.select_pin_pca9539r, PCA9539R_GPIO_STATE_SELECT_OUT_0); There's a 1000 ms delay between setting states. [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:131: setting state again [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 1 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1167 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1175 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1165 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1181 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1165 [0] projects/test_bts7200/src/main.c:78: reading1: 1185 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1167 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1173 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1167 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1175 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1171 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1173 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1168 [0] projects/test_bts7200/src/main.c:78: reading1: 1173 [0] projects/test_bts7200/src/main.c:78: reading1: 1175 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1173 [0] projects/test_bts7200/src/main.c:78: reading1: 1181 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1181 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1165 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1164 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1180 [0] projects/test_bts7200/src/main.c:78: reading1: 1180 [0] projects/test_bts7200/src/main.c:78: reading1: 1168 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1183 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1173 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 1184 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1182 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1183 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 1181 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1175 [0] projects/test_bts7200/src/main.c:78: reading1: 1167 [0] projects/test_bts7200/src/main.c:78: reading1: 1169 [0] projects/test_bts7200/src/main.c:78: reading1: 1170 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:134: setting state 3 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:78: reading1: 1172 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 Still seems to happen when ADC on a 250ms timer: [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:131: setting state again [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 1178 [0] projects/test_bts7200/src/main.c:78: reading1: 1166 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:134: setting state 3 [0] projects/test_bts7200/src/main.c:78: reading1: 1179 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 This time with set state on a 1000 ms delay and readings on a 500 ms delay: (reading 1 and reading 2 are taken one after the other here) [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:80: reading2: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:80: reading2: 2 [0] projects/test_bts7200/src/main.c:133: setting state again [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:80: reading2: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 1167 [0] projects/test_bts7200/src/main.c:80: reading2: 1167 [0] projects/test_bts7200/src/main.c:78: reading1: 1176 [0] projects/test_bts7200/src/main.c:80: reading2: 1176 [0] projects/test_bts7200/src/main.c:78: reading1: 1177 [0] projects/test_bts7200/src/main.c:80: reading2: 1177 [0] projects/test_bts7200/src/main.c:136: setting state 3 [0] projects/test_bts7200/src/main.c:78: reading1: 1174 [0] projects/test_bts7200/src/main.c:80: reading2: 1174 [0] projects/test_bts7200/src/main.c:78: reading1: 2 [0] projects/test_bts7200/src/main.c:80: reading2: 2 [0] projects/test_bts7200/src/main.c:78: reading1: 2 however, putting even a 1ms delay between readings seems to solve the issue. Here's set state on a 1000 ms delay, and adc reading 1->2 1ms, 2->1 50 ms [0] projects/test_bts7200/src/main.c:89: reading 1: 2 [0] projects/test_bts7200/src/main.c:80: reading 2: 2 [0] projects/test_bts7200/src/main.c:89: reading 1: 3 [0] projects/test_bts7200/src/main.c:80: reading 2: 2 [0] projects/test_bts7200/src/main.c:142: setting state again [0] projects/test_bts7200/src/main.c:89: reading 1: 2 [0] projects/test_bts7200/src/main.c:80: reading 2: 1164 [0] projects/test_bts7200/src/main.c:89: reading 1: 1174 [0] projects/test_bts7200/src/main.c:80: reading 2: 1168 [0] projects/test_bts7200/src/main.c:89: reading 1: 1174 [0] projects/test_bts7200/src/main.c:80: reading 2: 1178 [0] projects/test_bts7200/src/main.c:89: reading 1: 1178 [0] projects/test_bts7200/src/main.c:80: reading 2: 1176 [0] projects/test_bts7200/src/main.c:89: reading 1: 1179 [0] projects/test_bts7200/src/main.c:80: reading 2: 1180 [0] projects/test_bts7200/src/main.c:89: reading 1: 1168 [0] projects/test_bts7200/src/main.c:80: reading 2: 1176 [0] projects/test_bts7200/src/main.c:89: reading 1: 1180 [0] projects/test_bts7200/src/main.c:80: reading 2: 1174 [0] projects/test_bts7200/src/main.c:89: reading 1: 1175 [0] projects/test_bts7200/src/main.c:80: reading 2: 1174 [0] projects/test_bts7200/src/main.c:89: reading 1: 1175 [0] projects/test_bts7200/src/main.c:80: reading 2: 1164 [0] projects/test_bts7200/src/main.c:89: reading 1: 1168 [0] projects/test_bts7200/src/main.c:80: reading 2: 1168 [0] projects/test_bts7200/src/main.c:89: reading 1: 1172 [0] projects/test_bts7200/src/main.c:80: reading 2: 1176 [0] projects/test_bts7200/src/main.c:89: reading 1: 1173 [0] projects/test_bts7200/src/main.c:80: reading 2: 1173 [0] projects/test_bts7200/src/main.c:89: reading 1: 1168 [0] projects/test_bts7200/src/main.c:80: reading 2: 1163 [0] projects/test_bts7200/src/main.c:89: reading 1: 1164 [0] projects/test_bts7200/src/main.c:80: reading 2: 1182 [0] projects/test_bts7200/src/main.c:89: reading 1: 1175 [0] projects/test_bts7200/src/main.c:80: reading 2: 1173 [0] projects/test_bts7200/src/main.c:89: reading 1: 1172 [0] projects/test_bts7200/src/main.c:80: reading 2: 1162 [0] projects/test_bts7200/src/main.c:145: setting state 3 [0] projects/test_bts7200/src/main.c:89: reading 1: 1173 [0] projects/test_bts7200/src/main.c:80: reading 2: 2 [0] projects/test_bts7200/src/main.c:89: reading 1: 2 [0] projects/test_bts7200/src/main.c:80: reading 2: 2

So it seems that the first ADC read after setting the PCA9539R is fucked regardless of the delay between setting it and reading it.

Theory: adc_read_raw on STM32 in ADC_MODE_SINGLE works by triggering a start-of-conversion, then waiting for ADC_FLAG_EOSEQ to get cleared by the IRQHandler (ADC1_COMP_IRQHandler) which is triggered on end-of-conversion and moves the conversion result from some STM32 register to the module’s storage. Theory is that EOSEQ is always 0 so adc_read_raw doesn’t wait for the IRQHandler, so it returns an old reading which only gets updated when the IRQHandler gets called in a few ms.

Experiment to confirm theory:

stm32f0xx/adc.c, adc_read_raw's if (!s_adc_status.continuous) block replaced with: ADC_StartOfConversion(ADC1); int count = 0; while (ADC_GetFlagStatus(ADC1, ADC_FLAG_EOSEQ)) { count++; } LOG_DEBUG("ADC lib count: %d\n", count); output 1 (there's two counts per read, one for the reading and one for vref): Version: c905dd5-dirty [0] projects/test_bts7200/src/main.c:154: read: 0 [0] projects/test_bts7200/src/main.c:155: setting state on [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] projects/test_bts7200/src/main.c:159: read: 1176 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] projects/test_bts7200/src/main.c:162: read: 1173 [0] projects/test_bts7200/src/main.c:163: setting state off [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] projects/test_bts7200/src/main.c:167: read: 4 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] libraries/ms-common/src/stm32f0xx/adc.c:224: ADC lib count: 0 [0] projects/test_bts7200/src/main.c:170: read: 2

So EOSEQ is always 0! (the read is normal probably because the log takes so long that the IRQHandler is called in the meantime)