Checklist for Gerbers

Owned by Micah Black
Last updated: Nov 26, 2024 by Liam Sky

In order to minimize the number of mistakes that could have been easily fixed before sending out a board, this page will hope to go through some common mistakes and other standards for our boards.

Make sure you clone a copy of this page under your project and run through this checklist before generating the gerbers. After going through the checklist, please attach your gerbers, BOM csv, and step file to the cloned page.

See https://jlcpcb.com/capabilities/Capabilities for more info.

JLC_DRC_Rules you can import, maintained by f39zhou

Schematic

  • Appropriate template is used
  • All elements are aligned to a 100mil grid
  • GPIOs requiring ADCs are connected to ADC capable pins
  • GPIOs requiring different interrupt controllers don't share the same pin number (e.g. PB1, PA1)
  • Excessive current is not drawn from GPIOs
  • Decoupling caps are present where needed
  • Fuse followed by TVS is present at power input

Board - Traces

  • High current loops have sufficient copper
  • No acute angles between traces and traces, and traces and pads.
  • Data lines have uninterrupted return paths
  • Differential signals are tightly coupled and impedance controlled
  • Teardrops are present

Board - Copper

  • Planes are stitched together
  • No ground islands or near-islands

Board - Mounting

Board - Connectors

  • Headers and pins for all communication protocols - for now, 0.1" headers, to standardize on a debug connector
    1. I2C
    2. SPI
    3. etc

Board - Vias

  • Vias are tented
  • Unused via pads are removed, except on outer layers
  • Sufficient number of vias present for large currents
  • Thermal vias present where appropriate

Board - Layers

  • Only the board outline is drawn in the keep out layer
  • Gerbers for the following layers are generated

Silkscreen

  • No overlapping text
  • Connectors are labeled
    1. With function on top side (power input, CAN, Thermistor, etc.)
    2. With pinout on bottom side (or top side if possible)
  • Logo is on the board
  • Correct Name is listed
  • Pin 1 labeled on all ICs
  • Ensure bottom silkscreen is mirrored
  • Optional parts (such as CAN termination) is labeled
  • Ensure all polarized components are labelled
  • Double-check all of silkscreen in 3D mode

BOM

  • Ensure that all parts are in the BOM, and have Supplier part numbers - ideally manufacturer part numbers as well
  • Ensure the no components are ordered on tape and reel
    1. Digikey part numbers that end in DKR usually have tape and reel - watch out for them!
  • The BOM must be generated and all parts put on digikey to make sure everything is in stock

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