Charger Interface Validation - MSXIV Rev 1.0

This page will document any hw debug or validation issues that came up during the bring up and testing of charger interface.

Reading PWM from Control Pilot

With MSXIV now using a less-sketchy method of charging, there is a need to make sure the EVSE charger interface that executes the J1772 protocol works with the charger interface board. Almost all information on the interface can be found on this wikipedia entry: SAE J1772
One issue that was seen from validation was that there was issue with measuring the PWM coming from the different charge states on the control pilot pin.

For the purposes of our use cases with the EVSE charger, we only care about the Status A and Status C of the following chart. This means that the voltage amplitude can either be

Open

Also for completeness, the following duty cycle chart shows which duty cycle corresponds to which current being pushed through the EVSE charger - apparently this is determined by the charger and the wall output, so we don’t control it:

Open

At the beginning of validation, we did not get a PWM read on the controller board. After ensuring that the trace was continuous to the controller board, we looked at the values we should be getting from the schematics. The following is the schematic for the path of the control pilot pin on charger interface:

For the cases we care about (peak amplitude of 12V and 6V) the peak amplitude would only be greater than Vih of the tta IOs of stm32 on the output of the resistor divider for the 12V case (3.2V peak) while the 6V peak would be lower than Vih (1.6V < 1.9Vih). Therefore, the 12V case should still work for measuring, but was not.

After some fw change on the smoke_pwm project (i think a timer value change?) by @Mitchell Langdon Ostler , we were able to read the PWM for the 12V Standby case(Mitchell can include any relevant details here for reference):

Unfortunately, the 6V case was still clearly out of range since for both 12V and 6V to be reasonable on the CB pins, 12V had to result in a value less than 3.3V while 6V greater than 1.9V (which is not possible with a resistor divider). Options were discussed to make use of both the pwm and analog pins of the control, pilot signal (PA5 and PA6) to create a set of equations to pinpoint each state and duty cycle, however that was dismissed due to overall complexity (not intuitive) and fact there exists non-unique points due to the analog signal not differentiating between the value of PWM and the amplitude of the PWM, makes it unideal. Another option was discussed to use the PWM pin as an analog input, which was also dismissed because in some cases this may be impossible due to the conversion time of the ADC and the frequency + duty cycle of the PWM (for example, it may be very hard to catch a 1kHz 10% DC signal high on the correct edges and convert that to an accurate PWM). For the ideal operation, there would be a hw change in which something like a difference amplifier was used to make the range between 12V peak and 6V peak smaller to fit both values within the range of controller board IO operation. For now, we still want to verify the 6V amplitude works given the need to ensure the entire high voltage power path (from 240VAC to load) works. It should be noted that in general, filtered PWM to provide an analog value should mainly be used for debug as reading the PWM is more accurate and does not include ADC error.

To do so, the resistor divider was modified to allow for the 6V range to be greater than Vih (of around 1.9V). To do this, since the standby mode is unavoidable in operation, the divider was modified so the 12V input is just under the absolute maximum rating for a tta IO pin, which is 4V. A R11 resistance of 7.37kohm was determined to achieve this, and can be seen in the following whiteboard calcs (using a paralleled 430 and 7.5kohm resistor):

After doing so, the PWM was read once again. Turned out that while the 12V input still gave a PWM, the 6V input still did not, which did not make sense. In order to debug, I added a jumper to probe the PA6 pin on one side of R15 (after the resistor divider), and found the following waveform (at the start is the 12V peak, and then it switches to 6V peak):

Interestingly, the 12V peak resulted in about 2.14V peak at the controller board, and the 6V peak was about 1.54V at the controller board. Not only were both these values not proportional (as they should be for a resistor divider) but it made sense that the duty cycle could not be read on the 6V peak. The only place that there could be additional impedance that would cause this, is from the output of the op-amp which should have minimal impedance, but seemingly was not the case due to these readings. The following calculations were done to see what this impedance could be:

It can be seen that the impedance for the 12V case is quite different than the 6V case. This would make sense due to the fact the impedance changes in the protocol for State A vs C, if there was not a buffer that should isolate the output and input impedances. Looking at the datasheet of the buffer, for our 1kHz operation there should only be about 400ohms of output impedance:

So, the reason there is seemingly either 1.5kohm of impedance (6V case) or 8.2kohm of impedance (12V case) is not clear. For now it is attributed to the op-amp itself and the operation of the input impedance control by the J1772 interface, but this still needs to be investigated (possibly by also looking at the results from replacing the op-amp).

From the last calculations whiteboard, the value of y(R11) was calculated to allow the output at 6V operation to be 2V considering that the 1.5kohm additional impedance exists. This value was checked with the impedance of 8.23kohm of the 12V peak, which also was in range from calcs (2.546V). Therefore, the final value of R11 = 4.3kohm was used. The following is the waveform from testing with R11 = 4.3kohm

It can be seen that both the duty cycles were in range and gave accurate readings on minicom:

Something to note is that the peaks of the amplitudes measured in that last video were also the same as the peaks from the calculations given the output impedances calculated (which possibly means the impedances are accurate/static). It should also be noted that there was a lot of high frequency noise on the 6V PWM (not 12V) which indicates a new revision should include an RC filter that filters above 1 to 2khz.

With duty cycle now being read for the states we care about, next: we are going to make sure that the high voltage power path completes all the way to the load.