Voltage Drops in Power Path Selection
This is just to log the potentially useful information in determining the voltage drops (and thus resistance and power loss) in the power selection portion of the rear power distribution Rev 1 board.
We are testing using the AUX input, which has 2 pairs of back to back FETs in parallel.
Current (A) | Fuse V Drop (V) | FET V Drop (V) | Rds FET |
---|---|---|---|
2 | 0.0502 | 0.0099 | 4.95 mOhm |
5 | 0.1294 | 0.0247 | 4.94 mOhm |
7 | 0.1863 | 0.0347 | 4.96 mOhm |
10 | 0.1492 | 0.0503 | 5.03 mOhm |
The fuse started heating up at the higher currents, and seemed to mess with the resistance measurements.
Temperatures after 5 minutes at 10A current draw:
Fuse: 50 deg C
Current sense resistor: 42 deg C
FETs: 35 deg C
Ambient was roughly 23 deg C
So does this line up with our thermal resistance calcs?
Lets start by verifying the Rds(on) value given in the datasheet:
We have calculated an Rds(on) of 5 mOhm for the 2 sets of parallel FETs.
Note that on the physical board, there is a different FET populated than in the BOM: FDMS6681Z. This fet has a slightly lower Rds(on) than the specced FETs.
We have 2 sets in parallel and then 2 in series, so the equivalent resistance should be that of a single FET - which is correct!
Now we can calculate the power dissipation:
Power = 5mOhm * 10A2 = 0.5W
And for temperature rise (assuming equivalent of parallel fets of thermal resistance):
Temp rise = 0.5W * Rja = 0.5 * 50/2 = 12.5 deg C
We had a temperature rise of 12 degrees measured, so the assumption of the thermal resistance of 2 parallel FETs seems correct, at least enough to design around. Given this result, we have lots of headroom for the temerature rise calculations done earlier (Power Path FETs Power Dissipation and Temp Rise). We should be able to get by with 1 FET. Note that the majority of the voltage drop happens on the fuse, and the FET drop is almost insignificant.