August 8th Meeting Notes - F19 Planning

By Josh Rong

James:

• cool down board
• lower capacitance, increase resistance of precharge and discharge
• better layout make it less compact, maight cuase bigger board
• debug circuit for spi
• more durac
• heat sink don't work, no contact with the resistor
• iso regulator don't work
• large fuses too tight
• discharge fet broke might be caused by water (water proof)
• large heat sink might be too heavy which can cause stress on the mount
• Add more fault protection for precharge

Liam:

• Add Soft satert relay input (slew rate)
• Larger state of charge data storage (SD card)
• Current sense switch out ADC (limit range)

Nita:

• Settle on having a light board
• need to implment 555 Timer and arrange pcb layout
• Figure out Location of the board

Rough Timeline

• First revision board send out: around one week after midterm (~Mid October)
• Agreed that designs are mostly done before next term midterm, deadline is one week after mid-term.
• Validation completion: 3 week after board recieve (ealry to mid Nove)
• Validation of each board can take various times, 3 week seems about right. (need further planing)

Other Notes

• Nothing will be change with the tut, Josh will fix the board.
• Didn't reach conclution about who hosting the workshops.