A Note on Pull-Up and Pull-Down Resistors

Pull-Up and Pull-Down Resistor Networks

Often in datasheets/schematics, you’ll see this used and referenced everywhere, but what does this actually mean? Before we go any further, let’s understand digital logic levels.

When we say we’re at a High/Low Logic level(1s and 0s), these logic levels are usually represented by two voltage ranges. For example, if we have “Ground”(0V) and 3.3V, 0V could be our Logic Low state(0) and 3.3V is our high stage(1).

In reality, it’s more or so a threshold of voltage ranges. For 3.3v Logic, usually anything below V_th(low) = 0.8V and above 0V is a “Logic 0”, and V_th(high) = 1.8V or so. Note that this always depends on the circuit and this is not a “rule”. But anyways, back to the original discussion

Based on this information, if the inputs to a digital circuit are not within range, evidently we’d get the wrong logic levels being displayed. Consider the circuit below :

If switch A is closed(the circuit is On), current flows to ground, so we have a Logic “0”

What if switch A is open(circuit is off)? We assume it’s 5V, but can we really conclude that? No. It could be anything really(Floating), where effectively we have an open circuit, we call this “High-Z” and there’s a chance it’s floating between two threshold ranges, and that could be a bad thing.

To prevent this, we use pull up/pull down resistors to give a pin a default state

Pull Up Resistors “Pull Up” to a High Logic level by default
Pull Down Resistors “Pull Down” to a Low Logic level by default
Recall Ohm’s Law : V = IR
Switch Open, input connected to 5V Supply Rail. There’s very little current into the logic gate, hence it’s a negligible voltage drop across the resistor.
Switch closes, the input is now shorted to ground, but the supply is not shorted as the pull-up resistor limits current

A similar logic applies for the pull-down resistor case