F0 TO F1 Migration

Owned by Mitchell Langdon Ostler
Last updated: Jan 10, 2023
3 min read

This page will encompass all the information with respect to the compatibilities and differences between the stm32f0 architecture and the stm32f1 architecture based on application notes and documentation.

 

The following images indicate whether software is compatible between the two chips with respect to peripherals:

As can be seen of the peripherals we use:

  • SPI

  • ADC

  • FLASH

  • GPIO

Have partial compatibility (and will need addition), while

  • USART

  • I2C

  • TIMERS

are identical.

 

ADC

  • ADC_InitTypedef

    • No longer has resolution as field

    • More possible ADC modes → will use independent (only one of the ADCs) and most likely multichannel

GPIO Config Settings for peripherals:

 

I2C Flow diagrams from stm32f1 reference manual:

Tx:

Rx:

CAN:

Interrupt specification for F1 → different from F0’s single global interrupt

Interrupt Flags:

Interrupt definitions for MD devices → 4 interrupt vectors (4 handlers, which we can poll for flags on)

 

 

 

Notes:

  • CMSIS needed to be upgraded to be compatible with later compiler

  • Need to go through and prune all build files to make as minimal as possible

  • Will need to update linker scripts before flashing