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- Vias are tented
- Unused via pads are removed, including on outer layers
- Planes are stitched
- Sufficient number of vias present for large currents
- Thermal vias present where appropriate
- Through holes have no paste opening
Board - Layers
- Make sure ONLY Only the board outline is drawn in the keep out layer
- Make sure all these layers are selected when generating your gerbers.Gerbers for the following layers are generated
- Paste mask expansion is appropriately set
Silkscreen
- No overlapping text
- "JLCJLCJLCJLC" order number location is specified
- Connectors are labeled
- With function on top side (power input, CAN, Thermistor, etc.)
- With pinout on bottom side (or top side if possible)
- Logo is on the board
- Correct Name is listed
- Pin 1 labeled on all ICs
- Ensure bottom silkscreen is mirrored
- Optional parts (such as CAN termination) is labeled
- Ensure all polarized components are labelled
- Double-check all of silkscreen in 3D mode
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