AFE

Revision 1 10 Jul 2017

Needs power LED so we can tell if the board is powered
Through-holes need to be widened
Test points should be through-hole (SMT pads are too sketchy for HV)
Use smaller analog mux?
Turns out the LTC6804 requires Vtop and Vbottom to be connected?
T_SELx need to have pullup resistors to Vreg (they're open-drain) - see pg60 in the LTC6804 datasheet
Change to vertical 2 pin duraclik headers

Through-holes still need to be widened
The C6 inputs on both connectors should be fused or one should be removed - I recommend removing one and switching to a 6-pin duraclik to prevent plugging in harnesses the wrong way
~~Still need to use smaller analog mux~~
- The smaller mux wouldn't help much with board size so there's no real point in doing so. I'll fix the BOM to have the correct part.
ICMP and IBIAS pins are flipped - Should be IBIAS → resistor → ICMP → resistor → GND
Silkscreen for connectors, silkscreen for daisy-chain direction
Use V_ref2 for the external thermistor? It's at 3V nominal and seems to be designed for thermistors.
- Not sure if this is the best idea since we get a larger voltage range with 5V and it's off a LDO anyways.
Replace the 10k resistors for thermistors with a resistor array?
Remove outdated note in isoSPI Interface sheet
Missing 100ohm and capacitor on C0?

isoSPI Mode 0 by default (for current sense)
Add connector for kill switch
Add ability to switch between master/slave and modes on isoSPI so we can use it as a sniffer
Bias resistors are flipped and are odd values - should be the same as AFE
Needs test points for 3v3, 12v, and GND