Needs power LED so we can tell if the board is powered
Through-holes need to be widened
Test points should be through-hole (SMT pads are too sketchy for HV)
Use smaller analog mux?
Turns out the LTC6804 requires Vtop and Vbottom to be connected?
T_SELx need to have pullup resistors to Vreg (they're open-drain) - see pg60 in the LTC6804 datasheet
Change to vertical 2 pin duraclik headers
Revision 2
Retrospective
Through-holes still need to be widened
The C6 inputs on both connectors should be fused or one should be removed - I recommend removing one and switching to a 6-pin duraclik to prevent plugging in harnesses the wrong way
Still need to use smaller analog mux
ICMP and IBIAS pins are flipped - Should be IBIAS → resistor → ICMP → resistor → GND
Silkscreen for connectors, silkscreen for daisy-chain direction
Use Vref2 for the external thermistor? It's at 3V nominal and seems to be designed for thermistors.
Replace the 10k resistors for thermistors with a resistor array?
Remove outdated note in isoSPI Interface sheet
Missing 100ohm and capacitor on C0?
Carrier
Revision 1
Retrospective
MISO and MOSI need pull up resistors to 3v3, they are also open-drain outputs
The 2 pin header for ISO SPI has pins 1 and 2 reversed, they should be swapped.
Revision 2
Retrospective
isoSPI Mode 0 by default (for current sense)
Add connector for kill switch
Add ability to switch between master/slave and modes on isoSPI so we can use it as a sniffer
Bias resistors are flipped and are odd values - should be the same as AFE