These ICs work together in an active clamp flyback converter topology:
https://www.power.com/products/innoswitch/innoswitch4-cz
https://www.power.com/products/clampzero/clampzero
I think this one is good for our application:
https://www.digikey.ca/en/products/detail/power-integrations/INN4074C-H185-TL/14319150
Lots of design examples are provided in the ‘design examples’ of the InnoSwitch page:
The DCM mode of operation will be used in order to decrease the size of the transformer. An example can be found here:
DER-979 - 100 W In-Wall USB Outlet with Selectable Output Voltage
DER-943 - 60 W General Purpose/Notebook PC Power Supply
Uses: INN4075C and CPZ1075M
Notes from reading:
Primary-side
C10 bypass capacitor, picked based on value of desired current limit of InnoSwitch
C5 is the main clamp capacitor, w Zener to protect
in CCM, takes care of leakage inductance, in DCM also takes care of magnetizing energy
When FluxLink signal from secondary receieved, HSD is sent to turn on Clamp switch
R2 configures the delay for ZVS turn off for the ClampZero fet
R5 & R6 allow for voltage sensing (but why 2 in series if both just go to pin…?
BPP is the bootstrap pin that powers the ClampZero IC
on startup, powered by internal high voltage current source which charges C10
C7 & C8 provide local decoupling, R1 prevents over current in BP2 line
During normal operation, coils 2&3 on the transformer provide power for the IC
Rectified w D2 and filtered with C9 to provide constant voltage to BPP
Frequency and ILim are selected based on output load
If BPP current too high (above ISD), chip restarts
Secondary-side:
C12 & C13 are the ‘main capacitors’ for filtering the output
C16 reduces high frequency ripple
RCD snubber in R8/C11/D4 reduces high frequency ringing + EMI
Synchronous Rectifying FET Q1 and D3 are the rectifiers
voltage sensed by FW through R7 determines when to turn Q1 on
for CCM, fet turns off before the next cycle via signal from ClampZero
for DCM, fet turns off once the voltage across is is below VSR(TH)
For CV, output voltage is sensed in FB by voltage division across R9 and R10
internal reference voltage of 1.265 V
Current sensing is through R14, measured by the IS pin
threshold voltage of ~35mV
Transformer Design
Bias winding to supply at least 4mA of current to BP1 and BP2 pins
Efficiency
We will spec our parts to have 100% load at ~60W, so nominal load of 30W is 50% load
according to this, we can expect to achieve that ~94% efficiency
InnoSwitch4-CZ-Datasheet Studying
https://www.power.com/sites/default/files/documents/InnoSwitch4-CZ-Data-Sheet.pdf
INN407x is constant voltage output, INN417x is constant current output
We want INN407x for constant voltage
ZVS of CalmpZero Switch
For CCM, tLLDL, the delay time between ClampZero turn off and Innoswitch conductionis determined by placing a resistor between HSD and SOURCE pin:
“centering this delay and the lowest point of the Drain voltage is critical for optimizing ZVS”
tLLDL is a function of fet drain node capacitance and leakage inductance of transformer
For DCM, tHLDL is a function of fet capacitance and leakage + magnetizing inductance of transformer
If constant current regulation is not required, the ISENSE pin must be tied to SECONDARY GROUND pin
Component Selection
Clamp Capacitor
Ilim Capacitor
Resistor for HSD to ZVS Delay Programming
OV Protection Zener Voltage
Schematic Doodling
