VALID Input Detection
Measuring the power supply input and the VALID output of the LTC4417, we get the following graph:
We see the appropriate ~256mS delay between the input being good and it being declared valid.
Switchover between valid inputs:
2 inputs were connected to the device within the valid range. The solid cursor shows when the power source was turned off. The output voltage (DARK BLUE) can be seen falling, and once it reaches the UV level, then the VALID output for that channel (PURPLE) immediately goes high (8uS delay according to datasheet). Then the alternate source is switched in and the voltage stays stable. The second input was a second power supply set to 13V.
YELLOW = 12.5V input voltage (stayed on)
DARK BLUE = Output Voltage (can be seen falling from 13-12.5V)
LIGHT BLUE = VALID for 12.5V PSU
PURPLE = VALID for 13V PSU.
The total switchover time was 4.2mS. This test was done with no load on the output. We will try this again with a load on the output.
Switchover with Load - Reset Loop Mode
At this point, the board start to go into the restart loop mode, so let’s go in to that a bit. This is with a 0.5A load on the output of the board.
Here is a graph of what is happening during the reset loops. This is with a single power supply connected to the DC-DC input.
YELLOW = Input voltage
DARK BLUE = Output voltage
LIGHT BLUE = AUX Valid (Aux was never turned on)
PURPLE = DC-DC Valid
Without a load on the output, the voltage decays much more slowly.
If we turn on a second input with a lower priority also at the edge of its voltage range, then the board behaves similarly, except this time with both inputs switching between valid and invalid:
So we have seen failure modes when the inputs are at the edge of their voltage range, but this does not seem to explain why discharging the capacitors would change anything. Let’s try and figure that out.
Testing continued by removing 1 of the capacitors after the FETs to bring the capacitance down to 100uF total. This seemed to do the trick, but is this amount of capacitance required? With only 1 capacitor on the board, I could not get it to trigger the reset loop condition (at least with the range of switching speed I had by pushing the output on/off button).
I also verified the 256mS period for re-validating a channel.
This trace (below) for the input voltage seems like it could trigger an undervoltage and then an overvoltage fault immediately after, but since the setup was a little janky, I would not trust that this is an actual observed spike instead of an artefact of the measurement setup.
Solutions to Discuss
Letting the capacitors discharge seems to be a counter-intuitive way to get the inrush current low enough that the effects of resistance do not cause a substantial voltage drop - you would think that discharging more would give a larger inrush current - so I went searching in the datasheet for soft-start since I seem to remember seeing that somewhere
From the Datasheet, pg 10:
“The LTC4417 gate driver pulls down on G1, G2 and G3 with a strong P-channel source follower and a 2µA current source. When the clamp voltage is reached, the P-channel source follower is back biased, leaving the 2µA current source to hold G1, G2 and G3 at the clamp voltage. To minimize inrush current at start-up, the gate driver soft-starts the first input supply to connect VOUT, at a rate of around 5V/ms terminating when any channel disconnects or 32ms has elapsed. Once slew rate control has terminated, the gate driver quickly turns on and off external back-to-back P-channel MOSFETs as needed. A SHDN low to high transition or VOUT drooping below 0.7V reactivates soft-start.”
Root Cause: UPDATE: see Inrush current testing below
The root issue is that the chip is not soft-starting again when the input is switched on. Discharging the capacitors triggers the soft-start again. Our supplies have large series resistance due to the wires attached to them and thus the voltage drop caused by the inrush current (even for capacitors that are not fully charged) triggers an Under Voltage Fault, which recovers quickly once the output is switched off.
Possible Solutions:
So yes - we need to drain the capacitors to below 0.7V in order to reactivate soft-start. One solution would be to just turn on a load to drain them quickly (but the controller board will only be able to activate the load for so long, but a better solution would be a discharge resistor on the board. We will need to make sure that the caps can be fully discharged within a given amount of time in order to properly activate the soft start.
FET slew rate limiting should not be required in this situation, as all of our supplies can handle high transient loads, and this will reduce the switchover time.
The other way to implement this would be to control the shutdown pin. If all 3 of the supplies are not valid (e.g. pulled to 3V3), and the chip is still powered, then we can pull the shutdown pin high in order to restart the chip completely and go through the soft start cycle again. With this solution we can add larger capacitors to the board, and should not have any issues with switchover times as the capacitor can store the required energy to hold up during switchover. We should make sure that on initial startup this does not keep the chip in shutdown.
Inrush Current Testing
So I’ve been doing a little more testing with the inrush current required to charge the capacitors. The aux battery is being used as the voltage source, and using the Keysight clamp meter, wrapping the wires around multiple times to get more resolution, and yes, the results below are the actual values (not the value shown on the screen) taking into account the number of turns.
On the DC-DC Input:
Turning On Properly: 1.7A
Stuck in Reset Loop: 0.65A
On the AUX Input:
Note that I have replaced the UVLO time delay cap with a 1.1uF capacitor (2x 2.2uF in series since I didn’t have any 1uF lying around) to increase the delay time to approximately 120mS according to equation 6 in the datasheet.
Turning on Properly: 7.5A
with the capacitor change, the AUX no longer goes into any reset loop.
Holding Artificial UV condition
In this test, I was attempting to see where the inrush current is mainly going - is it to charge the decoupling cap on the input or the bulk capacitors on the output?
DC-DC Input
The top side of R44 (UV threshold) was held LOW and the inrush current was re-rested using the same setup.
We measured about 1.8A.
Once removing the artificial UV condition, the chip started up immediately (the first time). Then if recreating the artificial UV and removing it with the board still powered, then we enter the reset loop again.
Inrush current during restart loop: 0.7A
Remember, however that this is the inrush current measured by the current clamp, and must be sustained for approx. 1ms. Looking at it scope, we can see that the spike happens much quicker, on the order of 10uS.
Aux Input
Holding the UV on Aux, we measure about 1.8A inrush current.
When releasing the forced UV, we measure another 7.5A of inrush current.
Other Testing
Playing with the shutdown pin does allow us to start perfectly when in the restart loop, however, trying to use the valid outputs did not work (possibly due to the resistors values on the gate and the pullup on valid).
Adding the extra capacitance for valid time delay on the AUX does work.
Inrush Current Testing
So I’ve been doing a little more testing with the inrush current required to charge the capacitors. The aux battery is being used as the voltage source, and using the Keysight clamp meter, wrapping the wires around multiple times to get more resolution, and yes, the results below are the actual values (not the value shown on the screen) taking into account the number of turns.
On the DC-DC Input:
Turning On Properly: 1.7A
Stuck in Reset Loop: 0.65A
On the AUX Input:
Note that I have replaced the UVLO time delay cap with a 1.1uF capacitor (2x 2.2uF in series since I didn’t have any 1uF lying around) to increase the delay time to approximately 120mS according to equation 6 in the datasheet.
Turning on Properly: 7.5A
with the capacitor change, the AUX no longer goes into any reset loop.
Holding Artificial UV condition
In this test, I was attempting to see where the inrush current is mainly going - is it to charge the decoupling cap on the input or the bulk capacitors on the output?
DC-DC Input
The top side of R44 (UV threshold) was held LOW and the inrush current was re-rested using the same setup.
We measured about 1.8A.
Once removing the artificial UV condition, the chip started up immediately (the first time). Then if recreating the artificial UV and removing it with the board still powered, then we enter the reset loop again.
Inrush current during restart loop: 0.7A
Remember, however that this is the inrush current measured by the current clamp, and must be sustained for approx. 1ms. Looking at it scope, we can see that the spike happens much quicker, on the order of 10uS.
Aux Input
Holding the UV on Aux, we measure about 1.8A inrush current.
When releasing the forced UV, we measure another 7.5A of inrush current.
Other Testing
Playing with the shutdown pin does allow us to start perfectly when in the restart loop, however, trying to use the valid outputs did not work (possibly due to the resistors values on the gate and the pullup on valid).
Adding the extra capacitance for valid time delay on the AUX does work.
So we are still getting too much of a voltage dip on the DC-DC input. So I tried a few other things.
Adding Extra capacitance to the input, we still get a large voltage dip:
Changing the location of the DC-DC voltage measurement so that its not directly under the FET and is out of the way of the high current inrush current path from the DC-DC capacitor to the Vout capacitors:
Removed one of the capacitors from the Vout, to get a total of 100uF instyaed of 200uF:
And the DC-DC UV measurement pin in the same conditions to show the undervoltage fault:
DC-DC supply Cable resistance: 50mOhm
Measuring the current with an oscilloscope:
We get a value of 0.9 V / 0.05Ohm = 18A
This current is not out of the range of possibility. If we look at all the resistances in the current path, we get a surprisingly high value:
battery IR + GND cable R + PWR cable IR + fuse cold resistance= 0.18+0.04+0.05+0.05 = 0.32 Ohms
The cables and fuse cause 0.32Ohm * 18A = 5.76V of voltage droop on the input - not too good.
The voltage drop from 13.8V down to 8V has a magnitude of 5.8V. 5.76V of which is accounted for by the cable’s resistance. The rest could come from parasitic inductance, other resistances, but most likely inarccurate measurements of the resistances. So we have a few options that will all help:
Extend the UV fault time so that the inrush current passes without a fault
Add a capacitor to the UV fault pin like the AUX inpt has
Reduce the inrush current from the battery
Increase the capacitance for V1, V2, V3 on the Power Selection board
Decrease the Vout capacitance
Reduce the slew rate on the Gate of the FETs to achieve a slower turn-on (like the AUX)
Force a soft start condition by pulling Vout low or manipulating shutdown
Add slew rate limiting circuitry (diode, cap, resistor)
Reduce the resistance between the power source and the power selection measurement
Relocate the measurement point
Create the better cables (instead of 50cm 18AWG with 2 connectors)
I tried this, and it did not help much. The fuse causes the bulk of the resistance.
Find a lower resistance fuse (might be tricky)
Looking at the transition on the AUX, we see that it takes a lot longer (100uS) and thus reduces the inrush current.
So I decided to continue with implementing the gate slew rate limiting on the DC-DC input as well. I put a 5nF capacitor from the gate to VBAT and a 2.2k resistor in series with VG2, values chosen according to what I had on hand and what was similar to the AUX values.
Below is the result
As you can see, we successfully have our lower voltage droop and thus less inrush current.
I have still been able to get it stuck in the reset loop when the DC-DC input is at the low end of its voltage range, with the little bit of inrush current there is causing it to dip below the threshold. The DC-DC is regulated, so it will not be in this range, and the AUX will be monitored before we hit it with high currents. But overall, we just had too much current and too much resistance. So was all this testing worth it for a problem that we might not have actually encountered in the car? From a time perspective, maybe not, but from a learning perspective, definitely!