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Open-Drain:
The defining characteristic of I2C buses is that both SCL and SDA are open-drain pins. Put simply, the pins are driven by a single transistor(MOSFET), where the When Vin is HIGH, Vout = GND. However, when Vin is LOW, we notice that Vout is left floating. That's when the pull-up resistor pulls the line HIGH
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Notice that there is only 1 NMOS transistor that controls Vout. A Pull-up/Pull-down GPIO has two transistors. The drain is connected to the signal, and the source is tied to ground. This means the STM32 can only pull the line LOW. It needs a pull-up resistor to go back HIGH, as the pin is left floating. This plays a crucial role in preventing contention (Covered in arbitration and clock stretching) and leaving the output in something called “High-Z”
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Notice that there is only 1 NMOS transistor that controls Vout. A Pull-up/Pull-down GPIO has two transistors. When Vin is HIGH, Vout = GND. However, when Vin is LOW, we notice that Vout is left floating. That's when the pull-up resistor pulls the line HIGH. If you’re still confused by the purpose of Pull Up/Pull Down Resistors, see this document.
Pull-up Resistors:
The value of your pull-up resistor plays a crucial role in efficient communication. The following relations are important in choosing your pull-up resistance:
Higher supply voltage → Higher pull-up resistor (V/I = R)
More resistance → Lower power and current consumption (V2/R = Power) (V/R = I)
Lower resistance → Higher bandwidth/frequencies; faster rise time
More capacitance → Lower pull-up resistor
Generally, you should check the GPIO pins source/sinking current to determine the sizing of the pull-up/down resistor. Common values are 1k, 4.7k, 10k, but that will always depend on the scenario)
https://www.youtube.com/watch?v=sCHK3P5tn7s
Take this example from a random forum online https://electronics.stackexchange.com/questions/102611/what-happens-if-i-omit-the-pullup-resistors-on-i2c-lines
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The poster added 4.7k ohm pull-up resistors, increasing the rise time significantly. Make sure to choose the appropriate pull-up resistance for your application! Also having I2C test points can really save your sanity 🤠
Note: This also goes into a different discussion of using good practices when probing signals(close ground return paths)
Multi-Slave Busses
I2C buses can hold up to 127 slaves on a single bus. Unlike SPI, I2C does not have a chip select line to control communication. Instead, I2C relies on IC addressing (each IC on the bus has a different address). Typically each slave has alternative addresses that can be configured in the situation two slaves have the same address.
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