In order to minimize the number of mistakes that could have been easily fixed before sending out a board, this page will hope to go through some common mistakes and other standards for our boards.
Make sure you clone a copy of this page under your project and run through this checklist before generating the gerbers. After going through the checklist, please attach your gerbers, BOM csv, and step file to the cloned page.
See https://jlcpcb.com/capabilities/Capabilities for more info.
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- All power input connectors are 2-pin Molex Micro Fit with part name "MSXV 2POS PWR" (with the correct GND/PWR orientation)
- Unless higher current is required, under special circumstances
- Easy attachment point for an oscilloscope probe GND - test points with the 'test point' part from digikey work well
- Make sure there are enough GND test points!
- Headers and pins for all communication protocols - for now, 0.1" headers, to standardize on a debug connector
- I2C
- SPI
- etc
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- For 2-layer boards, all vias >= 0.3mm hole, 0.6mm diameter
- For 4-layer boards, all vias >= 0.2mm hole, 0.45mm diameter
- Make sure vias do not interfere with internal layers (DRC should catch this)
- Thermal vias should be small and numerous - we want the greatest surface area between planes as possible
- For critical power traces, use multiple vias in parallel to reduce inductance and resistance
- In general for vias, make the diameter 2x the size of the hole.
Board - Layers
- Make sure there is a ONLY the board outline is drawn in the keep out layer surrounding your board.
- Make sure all these layers are selected when generating your gerbers.
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