This page will document all the changes for the second revision of solar sense β changes found from validation and assembly:
- relay footprint is wrong β increase the through hole size, pad size and distance between everything so it actually mates
- have a pin on the controller board get a high or low if connected to the right jumper config for 5 vs 6 mppt board
- none of the vias tented?? maybe manufacturing issue (this was not jlc) but double check pcb
- move C32 north so 12V isnt shorted to ground π
- switch mosi and clock and fix miso silk (says mso)
- reconfigure relay driver for low side output for current sinking IC
- indicator LED for 12V
- move the I2C pullup resistors to be near the controller board, not near the first mppt
- Add a fan control IC for solar fan (meant to help cool nomuras inside enclosure) controlled by onboard thermistor (from 5 mppt board extra thermistor slot) and powered off of solar (will be depopped for 6 mppt solar board)
- Also reconfigure thermistors so that the on-board resistor is a pull-up resistor and calculate the correct pull-up resistor values for the 2 types of temperature sensors - 100Ohm platinum RTD and 10K NTC thermistors
- Add more clearance to power pads from GND pour (this may have helped the C32 12V short to gnd, its weird it did not give me a warning about thatβ¦)
- Add LEDs for all the rails
- The relay driver has a status pin that turns on an LED when operational, however I forgot to connect that line to the relay sense pin on PA6 that is input to the controller board. Either use that status pin for relay sense, or an additional sense circuit on the contacts for that input. Rev 1 has absolutely no relay sense.
- I configured the status pin on the relay driver wrong, internally when status is triggered it shorts to ground β should have pull up with current limiting resistor and LED
- change c64 to at least 3.3uF β this will allow the tkeep to be ~250ms because at 1uf it was 75ms and therefore was not enough initial time for the contact to latch β there was rapid clicking, but by adding a 2.2uf cap in parallel (around 3.2uF total) there was a clean latch (this is for the relay driver)
- Change r49 to 100k or 50k for a larger hold current for relay driver.
- Turns out, the above two suggestions can be made (2.2uf and 100kohm) but the real issue was the layout of prototyping the relay with reworked PCB.
- One other thing to note for the relay driver is that when the enable pin is left floating, there is a 500kohm pullup (really weak) that will enable the relay in any case. For the next rev we should probably have a 100k pull down on the enable pin (some resistance significantly greater than from the stm gpio driver, and significantly less than 500k internal pullup) so the relay is only triggered when the controller board tells it to. Otherwise, if the solar board is supplied 12V, it will close the relay, which is both a safety and sequencing issue.