Checklist for Gerbers (Updated Fall 2021)

In order to minimize the number of mistakes that could have been easily fixed before sending out a board, this page will hope to go through some common mistakes and other standards for our boards.

Make sure you run through this checklist before generating the gerbers.

See PCB Manufacturing & Assembly Capabilities - JLCPCB  for more info.

Here are some DRC rules based on JLC PCB's capabilities.

Design Rules

Note: This checklist is not complete yet

Schematic

Block Diagram to follow the function of the board and quickly understand
Ensure that none of the GPIOs from the controller board have pins sharing the same number while requiring different interrupt controllers (e.g. do not have PB1 and PA1 as separate inputs triggered by the interrupt controller)

Board - Traces

Run DRC to verify spacing, make sure all traces are connected and find any net antenna. (All silk errors are not important as long as the silkscreen is thoroughly verified already for spacing).
Make sure to set the rules for trace widths to be relevant for the max and min for your board.
Check for any right angles in tracks (does not make a difference in performance, but looks terrible)
Check thickness of traces
Any high current traces should be sized appropriately
Go through the high current path through the board, around all components, etc. to make sure that there are no thin traces
Make sure there are absolutely no acute angles between traces and traces, and traces and pads.
Ensure differential signals (CAN, isoSPI) run parallel and as close together as possible
Clearance for high voltage traces -- check DRC

Board - Design

Polarized components point in the same direction.
Test Points: If a TP is at risk of ripping off the board, consider not using the pad test point
Signal Integrity
Separate high-speed signals from low-speed signals
Separate digital and analog signals as much as possible
Minimizing crosstalk: When tracks need to cross, have them at right angles (on separate layers). This reduces the capacitance and mutual inductance between the lines

Board - Copper

Keep the copper away from the very edge of the board
  • Copper to the edge of the board can cause shorts along the side of the board

    • Copper layer could peel up

    • Increases the chance of corrosion on the exposed copper

Make sure there are no right angles in poly pours or solid regions - could act as antenna otherwise.

Board - Mounting

Board - Connectors

  • Unless higher current is required, under special circumstances

  1. I2C

  2. SPI

  3. etc.

Board - Vias

Board - Layers

Silkscreen

  • With function on top side (power input, CAN, Thermistor, etc.)

  • With pinout on bottom side (or top side if possible)

  • Here are some places you can get the logo from:

    • Board: | Dimensions:

    • Board: | Dimensions:

    • Board: | Dimensions:

BOM

Generating Board Output Files → 5:30 mark

Configuring Your BOM in Altium Designer

  • This just increases cost for no reason (since we don't have a pick and place machine)

  • Digikey part numbers that end in DKR usually have tape and reel - watch out for them!

Generate Gerbers:

After Generating Gerbers

 

STEP File

  • If having trouble opening the STEP file in Solidworks to verify that it is correct, see this thread: SOLIDWORKS Forums

 

more new things to add: