Typos
I am sure there are lots on this page, please fix them if you see any!
Harnessing
Connectors
Type
Connectors shall be the Molex 3mm Microfit series whenever possible.
Pinout
Pinouts on schematics shall be one-one. If net x connects from board 1 to board 2, pin 1 for the connector on board 1 should correspond to pin 1 for the connector on board 2.
Altium
Component Creation
Templates
All components shall use their respective templates when being created. Templates may specify required parameters, these must be filled in.
There shall be no additional parameters for a component other than the ones specified in the template, unless it is necessary to capture a unique property of high importance.
Manufacturer part search
The “Acquire” feature to import a component to our library shall not be used from manufacturer part search. It may be used only from the Altium Celestial library if installed, and only for active components for which standard symbols and footprints do not exist.
A part choice may be used to auto-fill parameters present in a component template. You may “fix” parameters to map the property names used in the template to those used by the manufacturer. Only parameters in templates shall be imported. Symbols, footprints, and data sheets shall not be imported.
Component Name
In general, the component name should be the “Description” field from Digikey. By default, it will be the MPN which is meaningless for most people. However, naming conventions exist for the following type of components. The Digikey description will often, but not always match these conventions.
Resistors
“RES [value][unit prefix] OHM [tolerance]% [power fraction]W [package]”
Examples:
“RES 1K OHM 1% 1/10W 0603”
“RES 10m OHM 1% 1W AXIAL”
Capacitors
“CAP [type] [value][unit prefix]F [voltage]V [dielectric] [package]”
Examples:
“CAP CER 0.1UF 25V X7R 0603”
“CAP ALUM POLY 47UF 20% 35V SMD”
Symbol and Footprint Usage
Symbols and footprints for all common components shall use the standard symbols available in our library. You must choose to use an existing model during component creation, and choose from the ones available at Managed Content/(somewhere).
Only if a standard model does not exist, such as for ICs, you may create one. Models shall not be imported from the manufacturer part search, however they may be imported from the Altium Celestial library if installed.
Please reach out to a lead if you believe a new standard model for commonly used components should be created!
Symbol Creation
Symbols shall only be created when no suitable models already exist. This will be the case most often for ICs.
Designators
Keep designators to commonly used values. A list can be found at https://en.wikipedia.org/wiki/Reference_designator#Designators. If there is already similar component, use the same designator!
Pin Arrangement
Pins should be arranged to prioritize schematic readability over being representative of their physical location. The “typical application” section of a data sheet usually has a good arrangement of pins that lead to readable schematics.
Pin Type
Pins shall be of the “passive” type. It’s too much of a hassle to deal with maintaining the proper logic required for other pin types across all our schematics.
Pin length shall be 200 mils.
Parameters
Symbols shall have the following visible parameters:
Integrated Circuit: Name, MPN
Capacitor: Value, Voltage, Dielectric
Resistor: Value, Power, Tolerance
Inductor: Value, Continuous Current
FET: Name or (Current, Vdsmax)
Footprint Creation
Footprints shall only be created when no suitable models already exist.
Footprints shall follow IPC conventions and be made to the “Medium Density” specification. It is encouraged to use the Altium IPC compliant footprint wizard.
All footprints must have a detailed STEP model of the part, unless one cannot be obtained from the manufacturer or generated by the wizard. In that case, a rough approximation must be created using primitive shapes in Altium.
For IPC compliant packages where the manufacturer recommended footprint differs from the IPC standard, follow the IPC standard unless specific conditions exist where it would not be feasible to do so.
Component Sourcing
New components shall not be sourced if a suitable alternative already exists in our library.
Vendor
Digikey is the preferred vendor since they have the largest variety of parts and they give us a discount on our orders. Other vendors may only be used if a desired component does not exist on Digikey and modifications cannot be made to the circuit to utilize components available on Digikey.
Stock
Components used should be “well in stock”, that is, there are more than just a few units and it is foreseeable that it will remain in stock into the future. It is typically months between first choosing a component and when you finish the board and order it, and we want to avoid OOS re-spins.
Packages
If specific standards are not specified in the component category sections below, standard and widely available packages shall be used. This facilitates component interchangeability and greatly speeds up the component creation process since we already have many footprints in our library. Only if a non-standard package has specific advantages, or when a unique part is only available in that package, can they be used.
Resistors
Manufacturer
Stackpole is preferred for SMD resistors due to their low cost and high availability. Other vendors may be used when parts are only available elsewhere.
Tolerance
All resistors, except for high power resistors required to dissipate a lot of heat, shall have a tolerance of 1% or less.
Package
Resistors shall be 0603 SMD parts unless higher power dissipation or higher voltage tolerance is required. Typical 0603 resistors can handle 50mW and up to 75V, and offer a good balance between component density and ease of assembly, rework, and probing for debug.
Power
Resistors shall generally be specced to handle twice the expected continuous load, to allow for more margin and reduce the effects of resistance’s temperature dependence. The change in resistance with respect to temperature is given by the part’s temperature coefficient.
Note that some resistors claim very high power ratings. These are often under certain conditions where case temperature is kept to 25C through external heat sinking. This is not realistic for us, since keeping a part at room temperature while under full load requires sub ambient cooling. Thus, appropriate derating is required along with external heat sinking for high power applications.
Capacitors
Type
MLCCs are preferred for most applications due to their low ESR and high capacitance per volume. Film or electrolytic capacitors may be used in high voltage or high capacity applications.
Manufacturer
Samsung generally has the lowest prices. For applications that require detailed characteristics, Murata caps will have that information in their simsurfing tool.
Tolerance
A tolerance of 10% is preferred, with 20% being acceptable. Higher precision parts may be used if warranted by the application.
Package
MLCC 0603 SMD unless the application calls for characteristics requiring a larger package size.
Voltage Rating
At least 2x the expected maximum voltage in the application or 40V higher, whichever is less.
A capacitor with the highest voltage rating for a desired capacitance and package should be chosen if the cost is not significantly different.
MLCC Dielectric
X7R: preferred when available
X5R: when voltage/cap not available in desired package
C0G/NP0: low value, high precision applications due to their very stable DC bias characteristics.
Note that even X7R capacitors experience a significant drop in capacitance at higher voltages, typically > 50% drop at a 12V bias for 0603s. Graphs of capacitance vs DC bias for Murata caps can be found on their online simsurfing tool.
Inductors
Current
The maximum rated continuous current shall be at least 50% higher than the expected application. This value is generally covered by thermal limitations, the part will heat up due to IR losses.
The saturation current shall be below the expected peak current of the application. Beyond this point, the inductor will rapidly lose inductance, and can let much higher currents through than what is expected. Care should be taken especially in SMPS applications to account for the peak of the expected ripple current in the inductor.
Diodes
Package
The preferred package for low power applications is SOD-323. The preferred package for high power applications is DO-214AC.
Rectifying Diodes
Standard PN junction diodes can be used in rectifying applications where efficiency is not a concern. For cases where higher efficiency is desired, Schottky diodes can be used as they have a lower forward voltage.
TVS and Zener Diodes
TVS and Zener diodes are similar in their behaviour but differ in their construction. Both are used for their reverse breakdown characteristics.
TVS diodes are suitable for high instantaneous current, such as ESD or other forms of transient voltage suppression. Zener diodes have more precise breakdown thresholds, and are suitable for handling continuous reverse current such as for voltage regulation.
Fuses
Voltage
Fuses shall be rated for at least 25% higher than what the application requires.
FETs
Current
The rated current shall be at least double the expected application. The maximum current is typically defined by the thermal limit of how much heat the part can handle due to IR losses. Note that especially for high current FETs, the max current is given for specific conditions, often at a case (surface) temperature (Tc) of 25C. In reality, it is not realistic to keep the surface of the part at 25C under full load, as this would require sub ambient cooling. Thus, appropriate component derating must be performed.
LEDs
Indicator
Low power indicator LEDs are 0603 package. LEDs shall not be blue, as brief flashes on power-up/down looks like arcing.
Lighting
LEDs required in high power applications are of the JE2835 series.
Schematic
Template
All schematic sheets shall use Midnight Sun templates. The title block shall be populated using the relevant sheet parameters.
Component Source
All components used shall be from the team’s A365 library. No components shall be from the Altium content vault, a local library, or any other source.
Style
Grid
All schematics shall be drawn exclusively on a 100 mil grid for neatness. I will be sad if you use a 50 mil grid.
Power Net Naming
Use minimum number of significant digits, always include “V” where the decimal point would go.
Negative nets are prefixed with “N”, positive nets have no prefix.
Ex: 12V, 5V, 3V3, N2V1, 131V
SPI Net Naming
Different manufacturers use many different names for SPI signals. We use MOSI, MISO, SCK, and NSS. This follows STM32 datasheets.
Port Placement
Power ports should always face up (like the letter T), and ground ports should always face down.
Decoupling
IC decoupling shall be achieved by a minimum of one 0.1uF MLCC capacitor per power pin. Additional decoupling shall be added if warranted by the application, such as in high power devices. The datasheet will generally have recommended decoupling schemes. It is acceptable to round decoupling cap values to nicer numbers, ie 0.47uF to 1uF. Be weary of excessive capacitance resulting in inrush current.
Thermistors
The standard thermistor has a 10k value and is situated on the low side.
PCB
Mounting
Hole Type
The M2.5 hex standoff component shall be used for PCB mounting. The hole shall be 2.7mm in diameter, with a keep-out area 6mm in diameter. Mounting holes shall be low voltage ground where applicable.
Placement
Holes are placed in corners with the centre 3.5mm from the edge.
Size
Boards to be mounted on top of battery modules shall be 70 x 100mm with mounting holes located 3.5mm from adjacent edges in each corner.
Trace Width
Standard signals shall use 50ohm traces with an impedance profile set in Altium. Use Saturn Toolkit to calculate required width for higher current applications.
Vias
Standard Size [pad/hole] (mm)
2 Layer: 0.5/0.3
Multilayer: 0.45/0.2
For higher current applications, many standard vias offer more current carrying capacity per area than one very large via. Controlled impedance signals at or above USB High Speed (480Mbps) shall have controlled impedance vias. Saturn toolkit can be used to calculate via impedance and current carrying capacity. Standard JLC plating thickness is 18um, and the expected temperature rise shall be no more than 25C.
Stitching Vias
Comprised of standard vias(see above) placed on an offset 5mm grid, with 1mm clearance to pads/traces/board edge. Sometimes they can be more dense due to smaller board size or specific requirements.
Test Points
Size
SMD test points shall have an exposed copper area of at least a square with edge length of 1.27mm.
Through hole test points shall be un-tented PTH with a 0.7mm hole and at least a 1mm pad diameter.
Location
SMD test points are required for power rails and any analog voltages being measured by an ADC. Both SMD test points and 2.54mm headers are required for digital communication busses.
Thermal Relief
Thermals should be present unless there is sufficient reason to remove them. Some reasons to remove thermals include high current paths in a switcher, or when a thermal cuts down significantly on the area of a polygon. Generally decoupling caps should have thermals.
Logo
The top layer silkscreen shall contain the following graphic, with text under the “Midnight” letters in the following format:
[Car#] [BRD Name] Rev [major.minor]
ie. MSXV Controller Board Rev 1.0
Silkscreen
All components shall have component designators visible. The standard text has the following properties:
Mirror: Mirrored for bottom overlay
Text Height: 0.8mm
Stroke Width: 0.2mm
Font type: Stroke
Font: Default
Board Colour
PCB colour shall not be black or white due to the minimum solder mask sliver being larger for those colours.
Component Spacing
Small SMD components shall be spaced at least 0.5mm apart, or such that their outermost silkscreen lines do not more than fully overlap, whichever is greater.
Solder Paste Stencils
Stencil opening rule shall be set to -20%. Individual footprints may override this rule, such as fine pitch (>= 0.5mm) pads having a smaller paste opening to prevent solder from shorting the pins together.