Introduction
The goal of the Hardware Style Guide is to create a common standard for schematic capture and PCB layout for all hardware designers to follow. To understand the concepts discussed in this guide, it is recommended to read Using Altium Designer, specifically the Basic Concepts and Libraries and Component Creation pages.
Schematic Capture
A critical step in designing any piece of hardware and a large part of this guide is schematic capture. This process fleshes out all the high level decisions for the system architecture, connections between all components, and symbolic representations of each component. The schematic is crucial for anyone debugging and working with a system at a hardware or firmware level, so readability and logical organization must be kept in mind during the schematic capture process.
Specific guidelines to follow:
- Align all electrical connections (net label to wire, wire to pin, wire to port, etc) to a 10mil snap grid (Basic Concepts - Grids).
- All net labels, power and GND rails, ports, harnesses must be size 10 font.
- Set Midsun_Schematic_Template_Letter.SchDot as the default template for schematic sheets (Schematic Parameters - Document Parameters)
- Ensure that you update revisions both in the schematic (Document Parameters) and on the PCB (Silkscreen) every time you commit to your branch.
Schematic Symbol Creation
An important part of the schematic capture process is capturing each component as a reusable symbol. Most ICs these days are much too complex for their internals to be captured on the schematic, but there are still many ways to make schematic symbols more understandable for the reader.
Specific guidelines to follow:
- For complex ICs, do NOT match IC pinouts to their physical layout. Instead, put power pins on top, ground on the bottom, inputs on the left and outputs on the right. See here for reasoning.
Component naming (symbol reference) will follow this convention:
[TYPE OF COMPONENT] [DESCRIPTIONS AND FEATURES] [PACKAGE (where applicable)]
Common types of components:
IC, CAP, RES, EVAL, CONN, LED, IND, MOSFET, POT, DIODE, CRYSTAL, XFMR
Sample Descriptions:
REG BUCK 5V 0.3A, OPTOISOLATOR 5KV, ADC 24BIT
Sample Packages:
10DFN, SOT23-5, 0603, 8-SOIC, 5-SSOP
Complete Example:
IC REG BUCK 5V 0.3A 8-TDFN
- Add Component Parameters using the Supplier Search feature (Libraries and Component Creation - Using Supplier Search to add Component Parameters in Bulk)
- Set important parameters to visible so they can be viewed in the schematic:
- Capacitors (Capacitance, Voltage, Temperature Coefficient)
- Resistors (Resistance, Power, Tolerance)
- Inductors (Inductance)
- Connectors (Pitch)
- Crystals (Frequency)
- Diodes (Voltage, Current (for Schottky Diodes), Power (For TVS Diodes))
- LEDs (Forward Voltage, Colour)
- Complex ICs (Manufacturer Part Number)
- Other (Relevant maximum ratings as necessary)
- Align all pins to a 10mil snap grid (Basic Concepts - Grids).
- Use pin length of 20mil.
PCB Layout
Specific guidelines to follow:
- All boards must include a title block with board name and Rev X.Y (See below for revision naming conventions)
- All boards must have 4 mounting holes of size M2.5
PCB Footprint Creation
- Pin 1 on all SMT footprints will have rectangular pads with rounded rectangular pads on all other pins. The only exception is for QFN pads or other pads with small clearances. Manufacturer suggested layout patterns should be followed.
- Pin 1 on all through-hole footprints will have square pads. All other pins will have circular pads.
- Pin 1 of all footprints will be clearly defined on silkscreen
- All wire-to-board connectors must have clearly visible pinouts on silkscreen
- All components will have a 3D model. The more accurate the better, but at a minimum must provide the maximum bounds on the part.
Connector Standards
- Wire-to-board signals will use 2.0mm pitch Duraclik ISL connectors (DuraClik Connector System).
- Wire-to-board power will use 3.5mm pitch Ultra-Fit connectors (Ultra-Fit Connector System).
- Panelmount connectors will use a sealed, locking connector. We are currently assessing Deustche connectors.
- HV power connectors will also be panel mounted. We are currently aseesing Anderson SB connectors.
Carrier Board Standards
- All carrier boards must include a 2 position 3.5mm pitch Ultra-Fit connector to supply 12V to controller boards through the Bergstak mezzanine connector. Pin 1 should be for +12V and Pin 2 should be for GND.
- All carrier boards must contain a green power LED. This should be on the 12V rail and current limited with a 4.7k 0603 resistor.
Hardware Revisions
- Hardware revisions will be denoted by Rev X.Y
- X refers to the major revisions, each time a new version of the board is fabricated, X will be incremented by 1, Y will be set to 0
- Y refers to minor revisions prior to fabrication, each commit related to the project will increment Y by 1
- All boards must be reviewed by the electrical leads prior to fabrication
- All revisions should be properly documented on Confluence under the appropriate project page
- Any tests done to the board should also be documented on Confluence
Elecrow Design Rules
Elecrow is the PCB manufacturer we use to prototype new board designs. The final design will be fabricated by ITL Circuits, our PCB manufacturing sponsor.
These are some resources detailing Elecrow's PCB manufacturing capabilities. It is important to verify that a PCB layout is within these design constraints before the board is sent out for fabrication.
https://www.elecrow.com/wiki/index.php?title=Q%26A_for_PCB_service
https://www.elecrow.com/download/Readme%20before%20ordering%20PCB%20online%20V1.2.pdf