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Date

Participants

Goals

Review progress on current projects.

Action items

Supplemental BPS

  • Reverse relay coil suppression diode
  • Simulate the circuit
  • Larger relay to switch output (Up to 9 A load)
  • Switch to microfit connectors
  • Add an LDO for the reference voltage

Steering

  • Move decoupling capacitors closer to the ICs
  • Rearrange Schmitt triggers/signals to reduce the number of traces on the bottom layer

AFE

  • Tent vias
  • Label each pin on the connectors (especially voltage taps)

Charger Interface

  • Add keepout layer around board
  • Use a trace for 12 V instead of the long polygon
  • Put the capacitors before the crystal for U1
  • Replace SPI testpoints with a 5 pin header
  • Move Q1 closer to U5
  • Rotate C20 180 degrees
  • Move trace from P7 to P3 to top layer
  • Move LED3 to not cut the relay 12 V polygon
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