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Version 5
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AFE
Revision 1
Retrospective
- Needs power LED so we can tell if the board is powered
- Through-holes need to be widened
- Test points should be through-hole (SMT pads are too sketchy for HV)
- Use smaller analog mux?
- Turns out the LTC6804 requires Vtop and Vbottom to be connected?
- T_SELx need to have pullup resistors to Vreg (they're open-drain) - see pg60 in the LTC6804 datasheet
- Change to vertical 2 pin duraclik headers
Carrier
Revision 1
Retrospective
- MISO and MOSI need pull up resistors to 3v3, they are also open-drain outputs
- The 2 pin header for ISO SPI has pins 1 and 2 reversed, they should be swapped.