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SWD: Serial Wire Debug
It's a debug protocol.
Programming:
Programming in In the old controller board happened through the SWDIO and SWDCLK. Those are PA13 and PA14. I'm guessing there's also an NRST line that does the reset? Still have to figure that part out. Will look at the STM32 data sheet, we got debug capability through PA13 and PA14, which give us debug capability over SWD. This is what the connector looks like:
There's the PB6 and PB7 ports that are used for re-flashing. Here's what the data-sheet has to say:
Page 53 Reference Manual
Embedded boot loader
The embedded boot loader is located in the System memory, programmed by ST during production. It is used to reprogram the Flash memory using one of the following serial interfaces:
USART on pins PA14/PA15 or PA9/PA10
I2C on pins PB6/PB7 (STM32F04xxx, STM32F07xxx and STM32F09xxx devices only): This is what we're using!
USB DFU interface (STM32F04xxx and STM32F07xxx devices only)
Boot Configuration:
Data sheet has this table for boot configuration:
Our schematic grounds the BOOT0 pin.
This means that we're always operating on Main Flash Memory.
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