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Table of Contents

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  • Align all electrical connections (net label to wire, wire to pin, wire to port, etc) to a 10mil snap grid (Basic Concepts - Grids).
  • All net labels, power and GND rails, ports, harnesses must be size 10 font.
  • Set Midsun_Schematic_Template_Letter.SchDot as the default template for schematic sheets (Schematic Parameters - Document Parameters)
  • Ensure that you update revisions both in the schematic (Documet Parameters) and on the PCB (Silkscreen) every time you commit to your branch. 

Schematic Symbol Creation

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  • For complex ICs, do NOT match IC pinouts to their physical layout. Instead, put power pins on top, ground on the bottom, inputs on the left and outputs on the right. See here for reasoning.
  • Component naming (symbol reference) will follow this convention:

    Code Block
    languagebash
    firstline1
    [TYPE OF COMPONENT] [DESCRIPTIONS AND FEATURES] [PACKAGE (where applicable)]

    Common types of components:

    Code Block
    languagebash
    firstline1
    IC, CAP, RES, EVAL, CONN, LED, IND, MOSFET, POT, DIODE, CRYSTAL, XFMR

    Sample Descriptions:

    Code Block
    languagebash
    firstline1
    REG BUCK 5V 0.3A, OPTOISOLATOR 5KV, ADC 24BIT

    Sample Packages:

    Code Block
    languagebash
    firstline1
    10DFN, SOT23-5, 0603, 8-SOIC, 5-SSOP

    Complete Example:

    Code Block
    languagebash
    firstline1
    IC REG BUCK 5V 0.3A 8-TDFN


  • Add Component Parameters using the Supplier Search feature (Libraries and Component Creation - Using Supplier Search to add Component Parameters in Bulk)
  • Set important parameters to visible so they can be viewed in the schematic:
    • Capacitors (Capacitance, Voltage, Temperature Coefficient)
    • Resistors (Resistance, Power, Tolerance)
    • Inductors (Inductance)
    • Connectors (Pitch)
    • Crystals (Frequency)
    • Diodes (Voltage, Current (for Schottky Diodes), Power (For TVS Diodes))
    • LEDs (Forward Voltage, Colour)
    • Complex ICs (Manufacturer Part Number)
    • Other (Relevant maximum ratings as necessary)
  • Align all pins to a 10mil snap grid (Basic Concepts - Grids).
  • Use pin length of 20mil.

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  • All boards must include a title block with board name , and Rev X.Y (see See below ), designer(s), and date the board was sent to fabfor revision naming conventions)
  • All boards must have 4 mounting holes of size M2.5
  • Teardrops should be added at the end of layout

PCB Footprint Creation

  • Pin 1 on all SMT footprints will have rectangular pads with rounded rectangular pads on all other pins, the only exemption is for QFN pads or other pads with small clearances. Manufacture suggested layout patterns should be followed. .
  • Pin 1 on all through-hole footprints will have square pads, all other pins will have circular pads.
  • Pin 1 of all footprints will be clearly defined on silkscreen
  • All wire-to-board connectors must have clearly visible pinouts on silkscreen
  • All components will have a 3D model. The more accurate the better, but at a minimum must provide the maximum bounds on the part.

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  • Wire-to-board signals will use 2.0mm pitch Duraclik ISL connectors (DuraClik Connector System).
  • Wire-to-board power will use 3.5mm pitch Ultra-Fit connectors (Ultra-Fit Connector System).
  • Panelmount connectors will use a sealed, locking connector. We are currently assessing Deustche connectors.
  • HV power will use Anderson SB120sconnectors will also be panel mounted. We are currently aseesing Anderson SB connectors.

Carrier Board Standards

  • All carrier boards must include a 2 position 3.5mm pitch Ultra-Fit connector to supply 12V to controller boards through the Bergstak mezzanine connector. Pin 1 should be for +12V and Pin 2 should be for GND. 
  • All carrier boards must contain a green power LED. This should be on the 12V rail and current limited with a 4.7k 0603 resistor. 

Hardware Revisions

  • Hardware revisions will be denoted by Rev X.Y
    • X refers to the major revisions, each time a new version of the board is fabricated, X will be incremented by 1, Y will be set to 0
    • Y refers to minor revisions prior to fabrication, each commit related to the project will increment Y by 1
      • All boards must be reviewed by the electrical leads prior to fabrication
  • All revisions should be properly documented on Confluence under the appropriate project page
  • Any tests done to the board should also be documented on Confluence

Elecrow Design Rules

Elecrow is the PCB manufacturer we use to prototype new board designs. The final design will be fabricated by ITL Circuits, our PCB manufacturing sponsor.

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