This is a page to keep track of our PCB revisions, document design changes, and receive feedback.
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- Remove extra regulator circuit (Kevin's), source smaller crystals, make all resistors and LEDs 0603
- Fix trace lengths for crystals
- Reverse voltage protection? Decided not to implement on controller as the 12V connector will be on carrier board
- Fix all footprints to match the Hardware Style Guide - Still in progress
- Replace board info silkscreen as directed in the Hardware Style Guide - Incomplete, will do for next rev
- Connector changes:
- Combine SWD and UART headers (we may be able to hack the programmers to also be UART to USB adapters) or replace them with prototyping headers - Used 6 pin SMT 0.1" header
- Replace 12V connector with test points - Decided not to use test points as the regulator has already been tested (decoupling caps can be used as test points)
- Replace mezzanine connector with 0.8mm pitch equivalent to increase lifespan and verify mating height - 0.5mm pitch connectors need to be tested first, then consider this if necessary
- Change all connector part numbers to vertical connectors
- put male side of mezzanine on controller board
- Add guide holes for mezzanine footprint
- Signal connectors switched to Duraclik
- Silkscreen pinout for connectors
- Reduce induced ripple on 12V rail - Test with different input caps
- Improve ripple behavior on 3.3V rail - Will test with different output caps
- Calibrate regulator to 3.3V (currently at 3.36V) - Shouldn't be a big issue
- Get stencils
- Lower blue LED brightness (spec an LED ), raise green LED brightness
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- QFN is almost impossible to rework
- Need test points for everything, not just 1 for 3.3v - needed to scrape solder mask off to power the board
- Do silkscreen properly for diode, not have a tidy label in between pads
- Label as many things as we can with silkscreen
- We don't need to make everything as small as possible, it just needs to be reasonably sized.
- Consider larger resistances for LEDs, don't need them to be bright
- All components should have a 3D model for clearance
- Replace debug header with 0.05" Cortex-M standard
- CAN connectors should have the same pinout
- CAN has no direction so the silkscreen makes no sense
- MCU probably doesn't need every single alternate function, just things we'll actually use - the nets are probably a good level of verbosity.
- Lacks input protection → TVS, polyfuse etc.
- Separate analog and digital grounds → performance has not yet been tested and will be hard to quantify without testing firmware
- The regulator can be further simplified
- Probe the clock lines to check for performance
- 3V3 line has voltage ripple of about 60mV with 3mA draw from 12V upstream port (current was not measured at 3V3)
- 12mV of ripple is injected into the 12V lab supply line when 3V3 regulator is on