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Essentially, we iterate through the number of voltage registers (4) and for each we read the 3 uint16_t voltages and one 16-bit Packet Error Check from each of the AFEs at this register. These results are then placed at the correct position in the cell_voltages array based on the cell_bitset and cell_result_lookup
Cell Balancing
The goal of cell balancing is to ensure that we fully utilize the capacity of our pack. It is most important while charging, since the pack stops charging when the highest cell voltage reaches the charge limit. Thus, we don’t want to stop charging when once cell reaches the limit but a bunch of other cells are far below the limit. The cells are therefore balanced by discharging cells that have voltages which are too high, allowing all cells to come up to full charge.
Under high current load, differences between the internal resistance of the cells can cause the voltages to read different values when not actually at different states of charge. Based on the above, the proposed behaviour is as follows:
Min cell voltage < 4.0V or pack current draw > 10A
No balancing
Min cell voltage < 4.15V
Balance to within 10mV
Min cell voltage > 4.15V
Balance to the highest possible accuracy (set to 2mV for now, can tune later)
Aux Sense
Aux sense, used for the thermistors, is done on a per-cell basis. Essentially, each read is done for an individual input thermistor. Due to the daisy-chain, this result will be the width of readings*x afes.
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