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An interesting side effect of the way make works and how we've decided to implement our build system affects how we define our generic rules. Make does not run linearly, instead expanding variables as they are processed. This means that variables outside of a rule are processed as you'd expect, but variables within rules aren't processed until the rule itself is called. Since we redefine $(TARGET) repeatedly, we cannot use its value within a rule as it will just hold the last project or library that was included, not the proper target that we expect. To handle this, we've been adding the target name as the first order-only dependency in rules that require a target-specific variable and using firstword to get the first order-only dependency within the rule. This is not necessarily the best way to handle this situation, but it is currently the way we're doing it.
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